Physical ASIC Design Implementation Engineer
Il y a 2 mois
We are a Belgian engineering consulting firm that assists SMEs and large industrial organizations in bringing their innovation and R&D initiatives to life.
Job Description :We are currently looking for a Physical Implementation engineer for full backend (P&R) projects from netlist-in to GDSII-out flow, for top level chips as well as block level blocks in technologies ranging from N5 to 180nm. This with the full understanding of the complete Cadence Innovus Place&Route flow.The assignmentIn this assignment the selected candidate will be involved in:Setup of full netlist In to GDSII-out P&R flow (libs, derating, low power,..).Place&Route : from floorplanning untill postroute.Solve setup/hold/SI/power/... violations.Signoff Timing and Physical/logical verification (LEC, DRC, LVS,...).Discuss constraints/specs with, feedback results to and cooperate with customer.
Profile / Requirements :Required knowledge and skillsYou have 10 years of experience in physical implementation in advanced nodes (12 – 7nm) and hierarchical designs. You have experience in debugging capabilities You have experience with tcl scriptingYou can organize your work flexible, and make sure the progress in the project is running smooth To be able to communicate in English is a must, you will also interact with external customersYou function well in an international team.
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