ASIC Design Engineer
il y a 1 semaine
ASIC DESIGN ENGINEER - ANTWERP (BELGIUM) - PERMANENT POSITION
As an ASIC Design Engineer, you will be at the forefront of VLSI design for next-generation telecommunications applications.
You will be responsible for the entire ASIC development lifecycle, from architecture definition and RTL design to logic synthesis, timing closure, and power optimization.
Your work will directly impact high-speed networking, wireless infrastructure, and broadband communication systems, ensuring optimal performance, power, and area (PPA) efficiency in advanced semiconductor technologies.
In this role, you will focus on high-performance digital circuit design for ASICs that power 5G base stations, fiber-optic networks, data center interconnects, and software-defined networking (SDN) solutions.
You will work closely with system architects, verification engineers, physical design teams, and process technology experts to implement complex digital subsystems, ensuring compliance with telecommunications standards such as 5G NR, LTE, Ethernet, and SONET/SDH.
Key Responsibilities:
- Architect, design, and simulate analog and mixed-signal blocks such as high-speed amplifiers, filters, PLLs, ADC/DACs, and power management circuits.
- Perform SPICE-level simulations and behavioral modeling using Cadence Virtuoso, Spectre, ADS, or HSPICE.
- Work closely with layout engineers to ensure optimal parasitic-aware layout, minimizing noise, crosstalk, and mismatch effects.
- Collaborate with digital design teams for the successful integration of analog blocks into ASIC SoCs, ensuring robust signal integrity and interface compatibility.
- Design and optimize circuits for advanced CMOS nodes (e.g., 5nm, 7nm, 12nm, 28nm), ensuring high yield and manufacturability.
- Design high-speed analog circuits such as SerDes, CDR (Clock and Data Recovery), and equalization circuits for telecommunications applications.
- Develop low-power, high-linearity, and noise-efficient analog circuits for energy-efficient telecom solutions.
- Support post-silicon validation, lab testing, and debugging using oscilloscopes, spectrum analyzers, and high-frequency probes.
- Ensure analog designs meet telecommunications standards (e.g., ITU-T, IEEE 802.3, 3GPP) and EMI/ESD robustness.
Required Qualifications:
- Bachelor's, Master's, or PhD in Electrical Engineering, VLSI Design, Microelectronics, or a related field.
- 3+ years of experience in analog/mixed-signal ASIC design with a focus on telecommunications applications.
- Strong background in analog circuit design, including bandgap references, amplifiers, charge pumps, and voltage regulators.
- Expertise in high-speed mixed-signal circuits such as ADC/DAC, PLL, and SerDes.
- Proficiency with EDA tools (Cadence Virtuoso, Spectre, HSPICE, ADS, MATLAB, Python).
- Knowledge of CMOS process technology, layout best practices, and parasitic-aware design.
- Experience with post-layout simulations, IR drop analysis, and thermal simulations.
- Familiarity with low-noise design, jitter reduction techniques, and signal integrity analysis.
- Strong understanding of telecommunications standards and RF front-end architectures.
The Offer:
- Competitive salary and comprehensive benefits package, including meal vouchers, health insurance, and transportation allowance.
- Opportunities for professional growth through training and certification programs.
- A collaborative, innovation-driven work environment with a focus on sustainability.
- The chance to work on impactful engineering projects with global reach.
Please send over your CV to or call me on +32 (0) 3 318 00 74. As always, we are open to recommendations, so please feel free to pass this on to other suitable candidates.
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