Lead ASIC Physical Implementation Engineer
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ENGIBEX in Belgium seeks a Physical Implementation engineer to lead full backend (P&R) for top-level chips and blocks, from netlist-in to GDSII-out, using Cadence Innovus Place & Route. You will collaborate with the PD team and clients to translate specs into timing budgets.
You will partition top-level SDC, drive sign-off closure, and resolve setup/hold violations, SPEF/QUANTUS extractions, and power integrity concerns, within a human-centered, growth-focused environment.