PhD: QoS-Driven Shared Memory Chiplet Architectures

Imec Heilbronn is seeking a PhD researcher to investigate shared memory chiplet architectures that provide scalability and predictable performance for safety-critical systems. The work will explore cross-layer QoS mechanisms across interconnects, memory hierarchies, and scheduling to guarantee bounded latency.

You will contribute to designing die-to-die communication and chiplet memory controllers with differentiable service levels, bridging research and potential industrial adoption in