Senior Engineer, Software Permanent
il y a 6 jours
In this role, you'll be leading a team of 4 junior engineers in charge of the development of FPGA IP Cores. The role will be half focused on leading the team and half focused on your technical contributions. experience leading a team is beneficial, though not necessary.
~ Master's Degree in Electronics Engineering, or other similar degree.
~ Programming experience with VHDL, Verilog and Python.
~ Fluent in French and English.
Are you ready to contribute to the continued success of a market leader and help to mold the future career of junior FPGA engineers?
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il y a 3 semaines
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il y a 4 semaines
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