Senior DFT Architect for Next-Gen SoCs

pIMEC in Leuven, Belgium, is seeking a Senior DFT Engineer to advance Design-for-Test capabilities for next-generation semiconductor devices. You will shape test strategies for complex SOCs, coordinate with project teams, and drive DFT implementation across advanced nodes. /ppThe role emphasizes collaboration with physical design and test teams, ensuring fault coverage and high-quality silicon testability. 40 hours/week, permanent position in a world-leading RD environment. /p