SoC Architect

h3Your role /h3 pAs an experienced bSoC Architect, /byou define and deliver cutting‑edge system‑on‑chip (SoC) architectures for next‑generation products. In this role, you translate product requirements into a robust IC architecture, balancing performance, power, area, and cost. You lead the architecture definition, guide design teams, and ensure successful tape‑out and production launch. /p h3Key responsibilities /h3 ul liArchitecture Definition: Architect the overall IC structure, including digital, analog, and mixed‑signal blocks (in collaboration with analog IC architect) and test strategy. /li liRequirements Translation: Convert high‑level product specifications into detailed technical requirements for design teams. /li liIC‑Level Optimization: Balance trade‑offs in performance, power, area, and cost to meet product goals, within the timeline. /li liCross‑Functional Collaboration: Work closely with product managers, software architects, and customers to clarify customer requirements; align with project managers on resources, schedules, and milestones. /li liTechnical Leadership: Mentor and guide design engineers and sub‑system architects throughout development and implementation. /li liSupplier Partner Interaction: Define technical interfaces and ensure alignment with external suppliers. /li liProject Governance: Support structured project execution and maintain communication with local and remote teams. Report IC design status out to management /li liExpertise Application: Drive end‑to‑end chip delivery—from concept and specification to tape‑out and then towards qualification and production. Responsible for all chip related deliverables. /li /ul h3Core competencies /h3 ul liDeep knowledge of ASIC digital design flow (RTL to GDSII). /li liAbility to take concepts through tape‑out and to production, including performance analysis, cost optimization, and risk mitigation. /li liMaster the SoC design flow and strong understanding of verification methodologies (e.g., UVM). /li liExcellent communication skills and a collaborative mindset. /li /ul h3Qualifications /h3 ul liEducation: Master’s or PhD in Electronics, Microelectronics, or related field. /li liExperience: 12 years in full-chip design, SoC architecture, and delivery. /li liTechnical Expertise: /li liSoC integration and IC architecture. /li liDigital design flow and integration of analog/mixed‑signal IP’s. /li liProficiency in VHDL, Verilog and/or SystemVerilog. /li liFunctional verification at IP, subsystem, and top levels. /li liFamiliarity with tape‑out processes and fab interactions. /li liDomain Knowledge: CPU/DSP‑based ICs, power management, ultra‑low power, power/area/speed optimization trade‑off /li liDrive and follow the physical implementation / physical design /li liBe able to define requirements and discuss specifications of physical IP’s like IO’s, memories and standard cells, in advanced technology nodes /li liAware of ESD constraints and issues /li liConfiguration management, design databases and release processes are no unknown concepts /li liSoft

Skills:
Proactive, structured, quality‑oriented, and able to work independently and in a team. /li liGood communication and English language skills are a necessity /li /ul pMore information about NXP in Belgium... /p