Lead Digital IC Design Engineer – Mixed-Signal ASICs

Il y a 3 heures

Leuven, Flanders, Belgique ICsense Temps plein
pICsense in Heverlee, Belgium, is seeking an experienced digital IC design engineer to lead front-end design and verification of high‑quality digital and mixed‑signal ICs. You will specify digital requirements, interact with customers and suppliers, coach junior engineers, and present at worldwide project reviews, using VHDL/Verilog/SystemVerilog, UVM, STA/LEC, UPF/CPF, DFT/ATPG, and Python or C. /ppFluency in English is required and there are opportunities to grow across automotive, medical and /p