Stage - Development of an FPGA based multiple CAN System
il y a 2 semaines
Internship opportunity at John Cockerill Defense:
In this project, the main objective is to create a proof-of-concept for a multiple CAN Bus bridge utilizing Xilinx FPGA technology, such as zynq ultrascale+. The aim is to connect up to 8 CAN Bus interfaces, with adjustable speed and configurable protocol, through a single CAN line. The proof-of-concept will be implemented on a Xilinx development board.
- Understand the CAN Bus protocol.
- Explore the architecture and integration of IPs in a Xilinx FPGA.
- Conduct research on existing IP.
- Define and assess the requirements for development boards and FPGAs.
- Design a customized FPGA bitstream that integrates a configurable CAN Bridge.
- Verify communication using simulation testing tools like VHDL and UVM testbench.
- Test the CAN bridge on a development board to validate functions and stability of the solution.
- After confirming the bridge concept, develop a penta-CAN bus version and an octoCAN bus version.
The student must be available for a minimum of 3 months.
Profile:
- Seeking a student in electronic or electro-mechanical engineering with a master's degree-level education.
- Proficiency in English and French is required.
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Stage/tfe - Development of An Fpga Based Multiple
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