Senior FPGA Design Engineer

Il y a 2 jours

Seraing, Luik, Belgique EVS Temps plein 65 000 € - 90 000 € Contrat

EVS in Liège, Belgium, is seeking an experienced FPGA Design Engineer (medior/senior) to join its Hardware Engineering team. The role focuses on high-performance FPGA platforms for live video production, with hybrid work up to two days per week.

You will translate requirements into RTL, develop in Verilog/SystemVerilog (VHDL welcome), and own the full design flow from RTL to on-target validation, collaborating with cross-functional hardware, software and QA teams.