Full Custom Analog Layout Engineer

Description Designs advanced analog and mixed-signal integrated building blocks for RF CMOS, high-speed data communication, data acquisition and low-power & low-voltage applications. Key Responsibilities: Contributes to the successful realization of a project in a design team. Designs a given topology to meet the given specifications in the foreseen...

Lead AE in Leunven, Belgium on Virtuoso toolCadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.The AE is credible to articulate Cadence solutions...

/Analog/RF Device Engineer Analog/RF Device Engineer Engineering - Leuven | More than two weeks agoDo you want to model future CMOS transistors for analog/mixed-signal application. Then you might be the Analog/RF device engineer we are looking for. Analog/RF Device Engineer  What you will do Digital applications have driven the evolution of CMOS...

Lead AE in Leunven, Belgium on Virtuoso tool Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. The AE is credible to articulate Cadence...

Summary You have a M.Sc. or Ph.D. in electrical engineering, and you have a solid expertise in analog and mixed-signal IC design. You worked with advanced CMOS technology nodes. You are eager to join a dynamic team developing cutting-edge technology products for next generation mmWave applications. You are a self-motivated and efficient team member with good...

We have had a great opportunity for a Senior Digital Design Verification Engineer in Belgium. Job Title: Senior Digital Design Verification EngineerLocation: Leuven, Belgium – minimum 3 days in officeType: Freelancer | 100% FTE (40 hours/week)Duration: 6 monthsStart Date: 12 Jan 2026Hourly rate: €60–75/hour Key Skills:UVMSystemVerilogAssertion-Based...

We have had a great opportunity for a Senior Digital Design Verification Engineer in Belgium. Job Title: Senior Digital Design Verification EngineerLocation: Leuven, Belgium – minimum 3 days in officeType: Freelancer | 100% FTE (40 hours/week)Duration: 6 monthsStart Date: 12 Jan 2026Hourly rate: €60–75/hour Key Skills:UVMSystemVerilogAssertion-Based...

We have had a great opportunity for a Senior Digital Design Verification Engineer in Belgium. Job Title: Senior Digital Design Verification EngineerLocation: Leuven, Belgium – minimum 3 days in officeType: Freelancer | 100% FTE (40 hours/week)Duration: 6 monthsStart Date: 12 Jan 2026Hourly rate: €60–75/hour Key Skills:UVMSystemVerilogAssertion-Based...

We have had a great opportunity for a Senior Digital Design Verification Engineer in Belgium. Job Title: Senior Digital Design Verification Engineer Location: Leuven, Belgium – minimum 3 days in office Type: Freelancer | 100% FTE (40 hours/week) Duration: 6 months Start Date: 12 Jan 2026 Hourly rate: €60–75/hour Key Skills: UVM SystemVerilog...

Responsibilities:_Own the verification of a block, some subsystem part or some top level functions_Detail the verification specification of the assigned testcases_Implement the testcases using System Verilog, UVM, Python, assertions_Maximize the verification coverage of the design while focusing on execution time_Maintain the regression suite_Execute to meet...