Senior Digital Design Engineer

Il y a 18 heures

Leuven, Flanders, Belgique Cyient Temps plein

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Do you have a passion for building entirely new solutions? As part of our Digital Design team, you’ll take imaginative ideas and turn them into reality. Responsibilities Micro-architecture definition for efficient and power-optimized architectures RTL development using System Verilog, or Verilog, VHDL Low-power design (UPF) Lint, CDC/RDC Synthesis constraining Soft and hard IP identification, selection and integration Collaboration with verification team in verification plan development and debug Collaboration with backend team to close the design on timing and power Minimum Qualification B.
S. or M.
S. degree in Electrical Engineering, Computer Engineering or Computer Science with min. 4 years of experience in digital design Strong communication and presentation skills Proactive mindset, strong problem solving skills, ability to work autonomously Knowledge of RTL design Knowledge of Testbench development Knowledge of System Verilog and VHDL, Verilog Preferred Qualification Knowledge of mixed signal concepts Experience in data path development Experience in SoC architectures incl. CPU (ARM), Memory and Peripheral Subsystems Experience with Synthesis, Timing Closure Experience with Power Analysis and Optimization Experience in Formal Verification Methodology Experience in advanced Functional Verification Mythologies, i.e. UVM, Coverage modeling xperience with scripting languages (TCL, Python, Perl, Shell-scripting)

Senior Digital Design Engineer

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Senior Digital Design Engineer

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