Senior Principal Physical Design Engineer

pSenior Principal Physical Design Engineer Job Summary As a Senior Principal Physical Design Engineer, you will be a key technical leader responsible for driving and executing advanced physical design activities for complex SoC and IP blocks. You will play a pivotal role in achieving challenging performance, power, and area targets for cutting-edge semiconductor products. /ph3Job Responsibilities /h3ulliLead and execute all aspects of physical design for large-scale digital designs from RTL to GDSII, including floor planning, power planning, place and route, clock tree synthesis, static timing analysis (STA), formal verification, design rule checking (DRC), and layout versus schematic (LVS). /liliDrive and optimize design methodologies, flows, and scripts to improve efficiency, turnaround time, and design quality. /liliPerform critical path analysis and provide innovative solutions to meet aggressive frequency and power targets. /liliCollaborate closely with design, architecture, and verification teams to ensure robust design implementation and resolve complex technical issues. /liliMentor junior and mid-level engineers, providing technical guidance and fostering their growth within the physical design domain. /liliEvaluate and integrate new EDA tools and technologies to enhance physical design capabilities. /liliContribute to defining and reviewing design specifications and architecture documents from a physical implementation perspective. /liliDevelop and implement low-power design techniques (e.g., clock gating, power gating, multi-voltage design) to achieve challenging power budgets. /liliGenerate comprehensive reports and documentation throughout the design cycle. /li /ulh3Job Qualifications /h3ulliBachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field. /lili15+ years of extensive experience in ASIC physical design with a strong track record of successful tape-outs on advanced process nodes. /liliDeep expertise in industry-standard EDA tools for physical design (e.g., Cadence Innovus/Tempus, Synopsys Fusion Compiler/PrimeTime, Ansys RedHawk/PathFinder). /liliProficiency in scripting languages (Tcl, Perl, Python) for automation and flow development. /liliStrong understanding of static timing analysis concepts, constraints, and methodologies. /liliHands‑on experience with low‑power design techniques and methodologies. /liliSolid understanding of semiconductor physics, process technology, and DFM (Design for Manufacturability) principles. /liliDemonstrated ability to lead technical initiatives and mentor other engineers. /liliExcellent problem‑solving, analytical, and communication skills. /liliAbility to work effectively in a fast‑paced, collaborative team environment. /li /ulpMore information about NXP in Belgium is available. /ppNXP Semiconductors N.
V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. /ppAs the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial IoT, mobile, and communication infrastructure markets. For more information, visit Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP,

we offer
online and offline learning opportunities to help you develop some of your core and professional skills. /ppCommitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. /ppAlso, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality. /ppThank you for considering a career at NXP. /p