Digital Design Engineer
Il y a 1 heure
Flemish Brabant, Flanders, Belgique
Vivid Resourcing Ltd
Temps plein
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pWe're current recruiting for a Digital Design Engineer to join an experienced hardware development team. /p pIn this role, you will be involved throughout the digital ASIC development lifecycle, from architecture and RTL design through to verification, synthesis and implementation. /p pYou will work closely with other digital, analogue, verification and systems engineers to develop robust, high-performance ASIC solutions. /p pThe position offers the opportunity to take ownership of complex digital design blocks while contributing to the development of next-generation semiconductor products. /p h3Key
Responsibilities:
/h3 ul liDesign and develop digital ASICs from specification and architecture through to implementation. /li liDevelop high-quality, synthesizable RTL using Verilog or SystemVerilog. /li liTranslate functional and architectural requirements into efficient digital designs. /li liWork closely with verification engineers to ensure robust design validation. /li liSupport simulation, debugging, synthesis and timing analysis. /li liContribute to design reviews and technical decisions across the ASIC development process. /li liAnalyse and resolve design issues at RTL and gate level. /li liCollaborate with analogue, mixed-signal, FPGA and systems teams where required. /li liContribute to improving design methodologies, coding standards and development processes. /li /ul h3Your Profile: /h3 ul liDegree in Electrical Engineering, Electronics Engineering, Computer Engineering or a related field. /li liProfessional experience in digital ASIC design, with a strong focus on RTL development. /li liStrong knowledge of Verilog and/or SystemVerilog. /li liGood understanding of digital design principles, RTL coding and synchronous design. /li liExperience with ASIC development flows, including simulation, synthesis and timing analysis. /li liFamiliarity with RTL verification and common simulation/EDA tools. /li liAbility to work from technical specifications and contribute to architectural discussions. /li liStrong analytical and problem-solving skills. /li liExperience working in multidisciplinary hardware development teams. /li /ul h3The Offer: /h3 ul liA salary benefits package commensurate with experience /li /ul
Responsibilities:
/h3 ul liDesign and develop digital ASICs from specification and architecture through to implementation. /li liDevelop high-quality, synthesizable RTL using Verilog or SystemVerilog. /li liTranslate functional and architectural requirements into efficient digital designs. /li liWork closely with verification engineers to ensure robust design validation. /li liSupport simulation, debugging, synthesis and timing analysis. /li liContribute to design reviews and technical decisions across the ASIC development process. /li liAnalyse and resolve design issues at RTL and gate level. /li liCollaborate with analogue, mixed-signal, FPGA and systems teams where required. /li liContribute to improving design methodologies, coding standards and development processes. /li /ul h3Your Profile: /h3 ul liDegree in Electrical Engineering, Electronics Engineering, Computer Engineering or a related field. /li liProfessional experience in digital ASIC design, with a strong focus on RTL development. /li liStrong knowledge of Verilog and/or SystemVerilog. /li liGood understanding of digital design principles, RTL coding and synchronous design. /li liExperience with ASIC development flows, including simulation, synthesis and timing analysis. /li liFamiliarity with RTL verification and common simulation/EDA tools. /li liAbility to work from technical specifications and contribute to architectural discussions. /li liStrong analytical and problem-solving skills. /li liExperience working in multidisciplinary hardware development teams. /li /ul h3The Offer: /h3 ul liA salary benefits package commensurate with experience /li /ul