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il y a 2 jours
Digital Verification Engineer – Leuven, Belgium – 6 Months Location: Leuven (minimum 3 days onsite) Contract Type: Freelance Start: ASAP Duration: 6 months Overview Our client in Belgium is seeking a Senior Digital Verification Engineer to support a new product development team. The successful candidate will play a key role in digital IC hardware verification, ensuring high-quality and reliable silicon delivery for high-volume products.
Key Responsibilities
Own verification activities for digital blocks, subsystems, or top-level functions Define and detail verification specifications and test cases Develop and implement test cases using SystemVerilog, UVM, Python, and assertion-based verification Optimize verification coverage while maintaining efficient execution time Maintain and execute regression test suites Participate in peer reviews and technical discussions Collaborate with architects and cross-functional teams (Analog, Firmware, Layout) to resolve design issues and ensure overall product success Required Skills & Experience 5–10 years of experience in digital IC design and/or verification Strong expertise in UVM, SystemVerilog, and assertion-based verification Proven experience delivering working silicon for high-volume production Familiarity with Cadence EDA simulation tools and Synopsys Spyglass Experience with VHDL, Verilog, and Python is preferred Knowledge of low-power design techniques (nice to have) Experience in audio processing and/or AI accelerators is an advantage Fluent in English
