Stage/tfe - Development of An Fpga Based Multiple

il y a 3 semaines


Ans, Belgique John Cockerill Temps plein

**THESIS DESCRIPTION**

The goal of this thesis is to develop a proof-of-concept of a multiple CAN Bus bridge based on a Xilinx FPGA technology. The system should interface up to 8 CAN Bus, with configurable speed and configurable protocol through a single CAN line. The proof-of-concept shall be developed on a Xilinx development board.

i. **Define the needs**

The student will start by understanding the CAN Bus protocol, than the architecture and the integration of IPs in a Xilinx FPGA.

ii. **Conceptual design**

The student will do some research on existing IP.

The student will define and evaluate the development boards and FPGA needs.

iii. **Create the prototype FPGA program**

The student will design a customized FPGA program integrating a configurable CAN Bridge and test it on the development board. He will validate the communication using testing tools.

Once the bridge concept is validated, the student will develop a penta-CAN bus version and a octo
- CAN bus version.
- **SUBJECT DISCUSSED DURING THESIS**
- CAN Bus, JTAG, Quad-SPI
- Xilinx FPGA
- Vivado development tools
- **STUDENT INTERNAL SUPPORT**

**During this thesis, the student will be supported by the electronic R&D department and the electronic industrialization and prototyping department of John Cockerill Defense.**:

- **REQUIRED LANGUAGE**

Both English or French with an master's degree level



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